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 TS27L4C,I,M
PRECISION VERY LOW POWER CMOS QUAD OPERATIONAL AMPLIFIER
s VERY LOW POWER CONSUMPTION :
10A/op
s OUTPUT VOLTAGE CAN SWING TO
GROUND
s EXCELLENT PHASE MARGIN ON
CAPACITIVE LOADS
s STABLE AND LOW OFFSET VOLTAGE s THREE INPUT OFFSET VOLTAGE
SELECTIONS DESCRIPTION These devices are low cost, low power quad operational amplifiers designed to operate with single or dual supplies. These operational amplifiers use the ST silicon gate CMOS process allowing an excellent consumption-speed ratio. These series are ideally suited for low consumption applications. Three power consumptions are available allowing to have always the best consumption-speed ratio:
N DIP14 (Plastic Package)
D SO14 (Plastic Micropackage)
P TSSOP14 (Thin Shrink Small Outline Package)
u ICC = 10A/amp.: TS27L4 (very low power) u ICC = 150A/amp.: TS27M4 (low power) u ICC = 1mA/amp.: TS274 (standard)
These CMOS amplifiers offer very high input impedance and extremely low input currents. The major advantage versus JFET devices is the very low input currents drift with temperature (see figure 2).
Output 1 1 14 Output 4 + + 13 Inverting Input 4 12 Non-inverting Input 4 11 VCC + + 10 Non-inverting Input 3 9 8 Inverting Input 3 Output 3
PIN CONNECTIONS (top view)
ORDER CODE
Package Part Number Temperature Range N TS27L4C/AC/BC 0C, +70C TS27L4I/AI/BI* -40C, +125C TS27L4M/AM/BM -55C, +125C Example : TS27L4ACN * * * D * * * P * * *
Inverting Input 1 2 Non-inverting Input 1 3 VCC + 4 Non-inverting Input 2 5 Inverting Input 2 6 Output 2 7
N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) * TS27L4BID : For delivery information, please contact your ST sales representative or distributor.
June 2003
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TS27L4C,I,M
BLOCK DIAGRAM
VCC
Current source
xI
Input differential
Second stage
Output stage
Output
VCC
E E
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vid Vi Io Iin Toper Tstg
+
Parameter Supply Voltage
3) + 1) 2)
TS27L4C/AC/BC
TS27L4I/AI/BI 18 18 -0.3 to 18 30 5
TS27L4M/AM/BM
Unit V V V mA mA
Differential Input Voltage Input Voltage
Output Current for VCC 15V Input Current Operating Free-Air Temperature Range Storage Temperature Range 0 to +70
-40 to +125 -65 to +150
-55 to +125
C C
1. All values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage.
OPERATING CONDITIONS
Symbol VCC+ Vicm Supply Voltage Common Mode Input Voltage Range Parameter Value 3 to 16 0 to VCC - 1.5
+
Unit V V
2/9
VCC
T24
T 25
T 26 T6 T8 T28 T1
Input R1 C1 Input
T27 T5 T 10
T 15
SCHEMATIC DIAGRAM (for 1/4 TS27L4)
R2
T2
T11
T 12
T17
T 18
T7
T 23 T3
Output
T19 T4
T16
T9 T 13 T 14
T20
T 22 T29
T21
VCC
TS27L4C,I,M
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TS27L4C,I,M
ELECTRICAL CHARACTERISTICS VCC+ = +10V, VCC-= 0V, Tamb = +25C (unless otherwise specified)
TS27L4C/AC/BC Symbol Parameter Min. Input Offset Voltage VO = 1.4V, Vic = 0V Vio Tmin Tamb Tmax TS27L4C/I/M TS27L4AC/AI/AM TS27L4B/C/I/M TS27L4C/I/M TS27L4AC/AI/AM TS27L4B/C/I/M
1)
TS27L4I/AI/BI TS27L4M/AM/BM Min. Typ. Max. 10 5 2 12 6.5 3.5
Unit
Typ. 1.1 0.9 0.25
Max. 10 5 2 12 6.5 3
1.1 0.9 0.25
mV
DVio Iio
Input Offset Voltage Drift Input Offset Current note Vic = 5V, VO = 5V Tmin Tamb Tmax
2 1 100 1 150 8.8 8.7 9 8.8 8.6 50 60 45 100 60 40
2 1 200 1 300 9
V/C pA
Iib
Input Bias Current - see note 1 Vic = 5V, VO = 5V Tmin Tamb Tmax High Level Output Voltage Vid = 100mV, RL = 1M Tmin Tamb Tmax Low Level Output Voltage Vid = -100mV Large Signal Voltage Gain ViC = 5V, RL = 1M, Vo = 1V to 6V Tmin Tamb Tmax Gain Bandwidth Product Av = 40dB, RL = 1M, CL = 100pF, fin = 100kHz Common Mode Rejection Ratio ViC = 1V to 7.4V, Vo = 1.4V Supply Voltage Rejection Ratio VCC+ = 5V to 10V, Vo = 1.4V Supply Current (per amplifier) Av = 1, no load, Vo = 5V Tmin Tamb Tmax Output Short Circuit Current Vo = 0V, Vid = 100mV Output Sink Current Vo = VCC, Vid = -100mV Slew Rate at Unity Gain RL = 1M, CL = 100pF, Vi = 3 to 7V Phase Margin at Unity Gain Av = 40dB, RL = 1M, CL = 100pF Overshoot Factor Equivalent Input Noise Voltage f = 1kHz, Rs = 100 Channel Separation 65 60
pA
VOH VOL Avd
V
50 100
mV
V/mV
GBP CMR SVR
0.1 80 80 10 15 17 65 60
0.1 80 80 10 15 18
MHz dB dB
ICC Io Isink SR m KOV en Vo1/Vo2
1.
A
60 45 0.04 45 30 68 120
60 45 0.04 45 30 68 120
mA mA V/s Degrees % nV ----------Hz dB
Maximum values including unavoidable inaccuracies of the industrial test.
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TS27L4C,I,M
TYPICAL CHARACTERISTICS Figure 1 : Supply Current (each amplifier) versus Supply Voltage
SUPPLY CURRENT, I CC ( A) 2.0 1.5 1.0 0.5
Figure 3b : High Level Output Voltage versus High Level Output Current
20 16 12 8 4 0 -50 VCC = 10V T amb = 25C V id = 100mV VCC = 16V
Tamb = 25C AV = 1 VO = VCC / 2
0
4 8 12 SUPPLY VOLTAGE, VCC (V)
16
OUTPUT VOLTAGE, V OH (V)
-40 -30 -20 OUTPUT CURRENT, I
-10
OH (mA)
0
Figure 2 : Input Bias Current versus Free Air Temperature
INPUT BIAS CURRENT, I IB (pA) 100 VCC = 10V Vic = 5V
Figure 4a : Low Level Output Voltage versus Low Level Output Current
OUTPUT VOLTAGE, V OL (V) 1.0 0.8 0.6 0.4 0.2 T amb = 25C V ic = 0.5V V id = -100mV 1 2 OUTPUT CURRENT, I OL (mA) 3 V CC = 3V V CC = 5V
10
1 25 50 75 100 125 TEMPERATURE, T amb (C)
0
Figure 3a : High Level Output Voltage versus High Level Output Current
5 4 3 2 1 0 VCC = 3V T amb = 25C V id = 100mV VCC = 5V
Figure 4b : Low Level Output Voltage versus Low Level Output Current
OUTPUT VOLTAGE, VOL (V) 3
OUTPUT VOLTAGE, V OH (V)
V CC = 10V VCC = 16V
2 1
T amb = 25C V i = 0.5V V = -100mV
id
-10
-8 -6 -4 -2 OUTPUT CURRENT, I OH (mA)
0
0
4 8 12 16 OUTPUT CURRENT, I OL (mA)
20
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TS27L4C,I,M
Figure 5 : Open Loop Frequency Response and Phase Shift Figure 8 : Phase Margin versus Capacitive Load
P H A S E M A R G IN , m (D e g re e s )
80 T amb = 2 5 C R L = 1M AV = 1 V CC= 1 0 V
50
P H A S E (D e g re e s )
40 G A IN
0 45 Phase Margin 90 135
70
G A IN (d B )
30
PHASE T amb = 2 5 C V CC+ = 1 0 V R L = 1 M C L = 100pF A VCL = 1 0 0 2 3 4
20 10 0 -1 0 10
60 50
Gain Bandwidth Product 10 10 5 10 6 10
180
10
7
40 0 20 40 60 80 100
F R E Q U E N C Y , f (H z )
C A P A C IT A N C E , C L (p F )
Figure 6 : Gain Bandwidth Product versus Supply Voltage
G A IN B A N D W . P R O D ., G B P (M H z )
120
Figure 9 : Slew Rate versus Supply Voltage
S L E W R A T E S , S R (V / s )
100 80
T amb = 2 5 C R L = 1M C = 100pF L AV = 1
0 .0 5 T amb = 2 5 C R L = 1M C = 100pF L 0 .0 4 SR
60 40
SR 0 .0 3
0 .0 2
0
4
8
12
16
4
6 8 10 12 14 S U P P L Y V O L T A G E , VCC (V )
16
S U P P L Y V O L T A G E , V CC (V )
Figure 7 : Phase Margin versus Supply Voltage
Figure 10 : Input Voltage Noise versus Frequency
P H A S E M A R G IN , m (D e g re e s )
50
T amb = 2 5 C R L = 1 M C = 100pF L AV = 1
EQUIVALENT INPUT NOISE VOLTAGE (nV/VHz)
60
300
VCC = 10V Tamb = 25C
200 R S = 100
40
100
30 0 4 8 12 16
0
1
S U P P L Y V O L T A G E , V CC (V )
100 10 FREQUENCY (Hz)
1000
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TS27L4C,I,M
PACKAGE MECHANICAL DATA 14 PINS - PLASTIC DIP
Millimeters Dim. Min. a1 B b b1 D E e e3 F i L Z 0.51 1.39 0.5 0.25 20 8.5 2.54 15.24 7.1 5.1 3.3 1.27 2.54 0.050 Typ. Max. 1.65 Min. 0.020 0.055
Inches Typ. Max. 0.065 0.020 0.010 0.787 0.335 0.100 0.600 0.280 0.201 0.130 0.100
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TS27L4C,I,M
PACKAGE MECHANICAL DATA 14 PINS - PLASTIC MICROPACKAGE (SO)
L C
G c1
a2 b e3 D M e
A
s E
14 1
8 7 F
Millimeters Dim. Min. A a1 a2 b b1 C c1 D (1) E e e3 F (1) G L M S 0.1 0.35 0.19 0.5 45 (typ.) 8.55 5.8 1.27 7.62 3.8 4.6 0.5 4.0 5.3 1.27 0.68 8 (max.) 0.150 0.181 0.020 8.75 6.2 0.336 0.228 Typ. Max. 1.75 0.2 1.6 0.46 0.25 Min. 0.004 0.014 0.007
a1
b1
Inches Typ. Max. 0.069 0.008 0.063 0.018 0.010 0.020 0.344 0.244 0.050 0.300 0.157 0.208 0.050 0.027
Note : (1) D and F do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (.066 inc) ONLY FOR DATA BOOK.
8/9
TS27L4C,I,M
PACKAGE MECHANICAL DATA 14 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
c
k
0,25 mm .010 inch GAGE PLANE L L1
E1
SEATING PLANE A A2 A1 b
C E
8
7
D
aaa
C
14
1
PIN 1 IDENTIFICATION
Millimeters Dim. Min. A A1 A2 b c D E E1 e k l 0.05 0.80 0.19 0.09 4.90 4.30 0 0.50 Typ. Max. 1.20 0.15 1.05 0.30 0.20 5.10 4.50 8 0.75 Min. 0.01 0.031 0.007 0.003 0.192 0.169 0 0.09
e
Inches Typ. Max. 0.05 0.006 0.041 0.15 0.012 0.20 0.177 8 0.030
1.00
0.039
5.00 6.40 4.40 0.65 0.60
0.196 0.252 0.173 0.025 0.0236
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States (c) http://www.st.com
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